Parallel processing techniques:The history and usage of MIPS approach for implementation of fast CPU

March 2017
Vol-3, Issue-2
Paper ID: 4097
ISSN: 2395-4396
Downloads: 0

Abstract & Details

Research Area
Computer engineering
Keywords
MIPS Pipeline parallel processing interlock
Abstract
Parallel processing techniques to implement faster CPU With MIPS architecture for efficient throughput.

Author Information

# Name Institute / Affiliation
1 Drashti joshi Sal institute of technology and engineering research
2 Pooja Thakar Sal institute of technology and engineering research

How to Cite

Use the following formats to cite this article in your research.

APA Style
joshi, Drashti & Thakar, Pooja (2017). Parallel processing techniques:The history and usage of MIPS approach for implementation of fast CPU. International Journal of Advance Research and Innovative Ideas In Education, 3(2), 674-681.
MLA Style
joshi, Drashti, and Pooja Thakar. "Parallel processing techniques:The history and usage of MIPS approach for implementation of fast CPU." International Journal of Advance Research and Innovative Ideas In Education, vol. 3, no. 2, 2017, pp. 674-681.
IEEE Style
Drashti joshi and Pooja Thakar, "Parallel processing techniques:The history and usage of MIPS approach for implementation of fast CPU," International Journal of Advance Research and Innovative Ideas In Education, vol. 3, no. 2, pp. 674-681, 2017.
Vancouver Style
joshi Drashti, Thakar Pooja. Parallel processing techniques:The history and usage of MIPS approach for implementation of fast CPU. International Journal of Advance Research and Innovative Ideas In Education. 2017;3(2):674-681.
Harvard Style
joshi, Drashti & Thakar, Pooja (2017) 'Parallel processing techniques:The history and usage of MIPS approach for implementation of fast CPU', International Journal of Advance Research and Innovative Ideas In Education, 3(2), pp. 674-681.
Chicago Style
joshi, Drashti and Pooja Thakar. "Parallel processing techniques:The history and usage of MIPS approach for implementation of fast CPU." International Journal of Advance Research and Innovative Ideas In Education 3, no. 2 (2017): 674-681.
Turabian Style
joshi, Drashti and Pooja Thakar. "Parallel processing techniques:The history and usage of MIPS approach for implementation of fast CPU." International Journal of Advance Research and Innovative Ideas In Education 3, no. 2 (2017): 674-681.

Export Citation

Related Research

Design Analysis and Implementation of Two Stage Operational Amplifier
RAJ KESARWANI et al. 2024 Electronics and Communication Engineering
PDF Unavailable
1X3 ROUTER RTL & UVM TESTBENCH
MOHARIL ABOLI et al. 2023 Electronic and Telecommunication (VLSI BASED)
PDF Unavailable
ASIC Implementation Of PULP RISC-V Core
Anirudh Rao M et al. 2022 Electronics and Communication Engineering
PDF Unavailable
FPGA IMPLEMENTATION OF KARATSUBA VEDIC MULTIPLIERS
Shankar R et al. 2021 Electronics and Communication Engineering
PDF Unavailable
Metastability Mitigation & Error Masking of Flip-Flop
APARNA et al. 2020 Electronics & Communication
PDF Unavailable
DESIGN OF CURRENT STARVED VCO USING POWER GATED INVERTER FOR PLL
MEENAKSHI TIWARI 2020 Electronics & Communication Engineering
PDF Unavailable
LVDS Design for High speed Application
Atharvan Boxey et al. 2020 Electronics
PDF Unavailable
virtual paintig through gesture detection and color segmentation technique using DE2 FPGA board
Ms. Pooja Bcahhav et al. 2019 Elctronics and telecommunication engineering
PDF Unavailable
THRESHOLD LOGIC’S IMPORTANCE IN BUILDING EFFICIENT AND COMPACT DIGITAL CIRCUITS AND ITS SCOPE IN MODERN TECHNOLOGY
E.VENU BHAGIRATH et al. 2019 ELECTRONICS AND COMMUNICATION ENGINEERING
PDF Unavailable