DESIGN AND IMPLIMENT 64 BIT MAC(MULTIPLY AND ACCUMULATE)
Abstract & Details
Research Area
VLSI SYSTEM DESIGN
Keywords
MAC
Vedic Multiplier
Carry save adder
Abstract
In this thesis I am going to design 64-bit multiply and Accumulator using Vedic multiplier Technique based on
Urdhva Tiryagbhyam “-vertically and crosswise sutra. reduce partial product with help of adders during
multiplication operation. Vedic multiplier is higher speed compared to other multipliers. It is observe simulation
waveform and Compared delay, area and speed. Reduce the delay with help of adders and to improve speed of
hardware module.
Design of Vedic multiplier with help of adders I want to analysis of adders and comparison of delay between to
adders and which adders better for delay in observation of Simulation waveform in Xilinx Software and
implementation in FPGA kit. it is comparison of performance parameter like delay, area and speed. Finally design
of high speed MAC unit.
License
This work is licensed under a Creative
Commons
Attribution-ShareAlike 4.0 International License.
Author Information
| # | Name | Institute / Affiliation |
|---|---|---|
| 1 | KALIND MEHTA | GTU PG SCHOOL |
| 2 | GAURANG PATEL | SAI Education and management services, university of ballaret, ,Austalia. |
How to Cite
Use the following formats to cite this article in your research.
APA Style
MEHTA, KALIND & PATEL, GAURANG (2016). DESIGN AND IMPLIMENT 64 BIT MAC(MULTIPLY AND ACCUMULATE). International Journal of Advance Research and Innovative Ideas In Education, 2(3), 536-540.
MLA Style
MEHTA, KALIND, and GAURANG PATEL. "DESIGN AND IMPLIMENT 64 BIT MAC(MULTIPLY AND ACCUMULATE)." International Journal of Advance Research and Innovative Ideas In Education, vol. 2, no. 3, 2016, pp. 536-540.
IEEE Style
KALIND MEHTA and GAURANG PATEL, "DESIGN AND IMPLIMENT 64 BIT MAC(MULTIPLY AND ACCUMULATE)," International Journal of Advance Research and Innovative Ideas In Education, vol. 2, no. 3, pp. 536-540, 2016.
Vancouver Style
MEHTA KALIND, PATEL GAURANG. DESIGN AND IMPLIMENT 64 BIT MAC(MULTIPLY AND ACCUMULATE). International Journal of Advance Research and Innovative Ideas In Education. 2016;2(3):536-540.
Harvard Style
MEHTA, KALIND & PATEL, GAURANG (2016) 'DESIGN AND IMPLIMENT 64 BIT MAC(MULTIPLY AND ACCUMULATE)', International Journal of Advance Research and Innovative Ideas In Education, 2(3), pp. 536-540.
Chicago Style
MEHTA, KALIND and GAURANG PATEL. "DESIGN AND IMPLIMENT 64 BIT MAC(MULTIPLY AND ACCUMULATE)." International Journal of Advance Research and Innovative Ideas In Education 2, no. 3 (2016): 536-540.
Turabian Style
MEHTA, KALIND and GAURANG PATEL. "DESIGN AND IMPLIMENT 64 BIT MAC(MULTIPLY AND ACCUMULATE)." International Journal of Advance Research and Innovative Ideas In Education 2, no. 3 (2016): 536-540.
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