Review on VHDL based design of convolutional encoder using vedic mathematics and viterbi decoder using parallel processing

Electronics engineering

Convolution encoder and viterbi decoder are widely used in many communication system due to the excellent error control performance.The convolutional encoder encodes the message and then the encoded bits are generated. The bits which are encoded are again sent to the Viterbi decoder and then decoded output is obtained. Convolution encoder using vedic mathematics which leads to improve delay and faster speed. There are sixteen sutras in Vedic multiplication in which “Urdhva Tiryakbhyam” has been used here because it is most efficient one in terms of speed. Viterbi decoder using parallel processing improves processing speed because trace back and decoder can simultaneously work.

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