AN EFFICIENT IMPLEMENTATION OF AES ON FPGA FOR PROTECTION OF IOT DATA

February 2019
Vol-5, Issue-2
Paper ID: 9563
ISSN: 2395-4396
Downloads: 0

Abstract & Details

Research Area
COMMUNICATION ENGINEERING
Keywords
AES FPGA Key IOT Cloud Security VHDL
Abstract
The Internet of Things the internet connectivity of various devices like desktop and laptop computers, smart phones and everyday things that utilize embedded technology to interact with the environment, all through the Internet .Encryption for protection or security of IOT Data can be done with the help of IP address which is through the internet connectivity which forms a network of physical objects. The interaction that is established between the objects and different internet enabled devices in a given area. The encryption and decryption is been carried out on Field Programmable Gate Array (FPGA) to make the system independent cryptosystem. The proposed design on Xilinx, and is verified the result using the synthesis tool of Xilinx ISE-Design software. The encryption and decryption is being done on VHDL. In this era where the whole world are been connected to each other by the means of communication where internet plays a very important role and where Data security is also very important in this paper we present a algorithm for security of data from different attacks with the help of AES (Advanced Encryption Standard).In this algorithm where we are using the symmetric key block cipher where the key would be given same with respect to encryption. Many applications it can be used as it is lossless operation. We limit our focus on 12b8 bit AES encryption and decryption where coded in VHDL coding. The proposed paper describes the private key cryptosystems which has a key with fixed size.

Author Information

# Name Institute / Affiliation
1 SHELLY R. WANKHEDE YASHWANTRAO CHAVAN COLLEGE OG ENGINEERING AND TECHNOLOGY
2 Dinesh B.Bhoyar YASHWANTRAO CHAVAN COLLEGE OG ENGINEERING AND TECHNOLOGY
3 Swati K.Mohod YASHWANTRAO CHAVAN COLLEGE OG ENGINEERING AND TECHNOLOGY

How to Cite

Use the following formats to cite this article in your research.

APA Style
WANKHEDE, SHELLY R., B.Bhoyar, Dinesh, & K.Mohod, Swati (2019). AN EFFICIENT IMPLEMENTATION OF AES ON FPGA FOR PROTECTION OF IOT DATA. International Journal of Advance Research and Innovative Ideas In Education, 5(2), 2739-2745.
MLA Style
WANKHEDE, SHELLY R., et al. "AN EFFICIENT IMPLEMENTATION OF AES ON FPGA FOR PROTECTION OF IOT DATA." International Journal of Advance Research and Innovative Ideas In Education, vol. 5, no. 2, 2019, pp. 2739-2745.
IEEE Style
SHELLY R. WANKHEDE, Dinesh B.Bhoyar, and Swati K.Mohod, "AN EFFICIENT IMPLEMENTATION OF AES ON FPGA FOR PROTECTION OF IOT DATA," International Journal of Advance Research and Innovative Ideas In Education, vol. 5, no. 2, pp. 2739-2745, 2019.
Vancouver Style
WANKHEDE SHELLY R., B.Bhoyar Dinesh, K.Mohod Swati. AN EFFICIENT IMPLEMENTATION OF AES ON FPGA FOR PROTECTION OF IOT DATA. International Journal of Advance Research and Innovative Ideas In Education. 2019;5(2):2739-2745.
Harvard Style
WANKHEDE, SHELLY R., B.Bhoyar, Dinesh, & K.Mohod, Swati (2019) 'AN EFFICIENT IMPLEMENTATION OF AES ON FPGA FOR PROTECTION OF IOT DATA', International Journal of Advance Research and Innovative Ideas In Education, 5(2), pp. 2739-2745.
Chicago Style
WANKHEDE, SHELLY R., Dinesh B.Bhoyar, and Swati K.Mohod. "AN EFFICIENT IMPLEMENTATION OF AES ON FPGA FOR PROTECTION OF IOT DATA." International Journal of Advance Research and Innovative Ideas In Education 5, no. 2 (2019): 2739-2745.
Turabian Style
WANKHEDE, SHELLY R., Dinesh B.Bhoyar, and Swati K.Mohod. "AN EFFICIENT IMPLEMENTATION OF AES ON FPGA FOR PROTECTION OF IOT DATA." International Journal of Advance Research and Innovative Ideas In Education 5, no. 2 (2019): 2739-2745.

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