VERIFICATION OF AHB PROTOCOL USING SYSTEM VERILOG ASSERTIONS

Nikhil B. Gaikwad; Vijay N. Patil

VERIFICATION OF AHB PROTOCOL USING SYSTEM VERILOG ASSERTIONS

October 2018

Vol-4, Issue-5

Paper ID: 9176

ISSN: 2395-4396

Downloads: 0

Abstract & Details

Research Area

ELECTRONICS & TELECOMMUNICATION

Keywords

AMBA AHB SV SVA

Abstract

Increasing technology increases the amount of logic that can be placed in a silicon chip driving highly integrated SoC design development. The most relevant factor for a SoC is how well they are interconnected. The SoC uses an on-chip bus architecture. AMBA (Advanced Microcontroller Bus Architecture) bus is most widely used the on-chip bus which is introduced by the ARM. Almost 85-90% of on-chip bus used in any SoC is AMBA (Advanced Microcontroller Bus Architecture). In this paper, an AMBA AHB bus Verification environment is built which is verified by using System Verilog Assertions. AMBA protocol (AHB) is verified by achieving successful read & write operations for incrementing burst feature. Simulation of AHB verification environment is done in Questa sim-simulator tool (from Mentor Graphics).

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Author Information

#	Name	Institute / Affiliation
1	Nikhil B. Gaikwad	Pimpri Chinchwad College of Engineering(PCCOE)
2	Vijay N. Patil	Pimpri Chinchwad College of Engineering(PCCOE)

How to Cite

Use the following formats to cite this article in your research.

APA Style

Gaikwad, Nikhil B. & Patil, Vijay N. (2018). VERIFICATION OF AHB PROTOCOL USING SYSTEM VERILOG ASSERTIONS. International Journal of Advance Research and Innovative Ideas In Education, 4(5), 731-741.

MLA Style

Gaikwad, Nikhil B., and Vijay N. Patil. "VERIFICATION OF AHB PROTOCOL USING SYSTEM VERILOG ASSERTIONS." International Journal of Advance Research and Innovative Ideas In Education, vol. 4, no. 5, 2018, pp. 731-741.

IEEE Style

Nikhil B. Gaikwad and Vijay N. Patil, "VERIFICATION OF AHB PROTOCOL USING SYSTEM VERILOG ASSERTIONS," International Journal of Advance Research and Innovative Ideas In Education, vol. 4, no. 5, pp. 731-741, 2018.

Vancouver Style

Gaikwad Nikhil B., Patil Vijay N.. VERIFICATION OF AHB PROTOCOL USING SYSTEM VERILOG ASSERTIONS. International Journal of Advance Research and Innovative Ideas In Education. 2018;4(5):731-741.

Harvard Style

Gaikwad, Nikhil B. & Patil, Vijay N. (2018) 'VERIFICATION OF AHB PROTOCOL USING SYSTEM VERILOG ASSERTIONS', International Journal of Advance Research and Innovative Ideas In Education, 4(5), pp. 731-741.

Chicago Style

Gaikwad, Nikhil B. and Vijay N. Patil. "VERIFICATION OF AHB PROTOCOL USING SYSTEM VERILOG ASSERTIONS." International Journal of Advance Research and Innovative Ideas In Education 4, no. 5 (2018): 731-741.

Turabian Style

Gaikwad, Nikhil B. and Vijay N. Patil. "VERIFICATION OF AHB PROTOCOL USING SYSTEM VERILOG ASSERTIONS." International Journal of Advance Research and Innovative Ideas In Education 4, no. 5 (2018): 731-741.