High speed and low complexity carry skip adder using reversible gates

Electronics and Communication Engineering

In this paper, we present a carry skip adder (CSKA) structure that has a higher speed yet lower energy consumption compared with the conventional one. The speed enhancement is achieved by applying concatenation and incrementation schemes to improve the efficiency of the conventional CSKA (Conv-CSKA) structure. In addition, instead of utilizing multiplexer logic, the proposed structure makes use of AND-OR-Invert (AOI) and OR-AND-Invert (OAI) compound gates for the skip logic. The structure may be realized with both fixed stage size and variable stage size styles, wherein the latter further improves the speed and energy parameters of the adder. Then the proposed structure is implemented using reversible logic such as toffoli gate which reduces the complexity by the garbage values, were it increases the speed thus the area, power and delay of the proposed structure is compared with conventional structure.

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