DESIGN AND VERIFICATION OF I2C PROTOCOL USING UVM.

Electronics and Communication Engineering

The I2C protocol was given by the Philips Semiconductors in order to allow faster devices to communicate with slower devices and also allow devices to communicate with each other over a serial data bus without data loss. I2C plays an important role as an interface in communication between devices. Electrically Erasable Programmable Read Only Memory (EEPROM), Analog to Digital Converter (ADC), Digital to Analog Converter (DAC) and Real Time Clock (RTC) requires an interface for communication and I2C is used as an interface between them. The serial communication reduces the cost of connection and the number of IC pins. I2C is one of the serial wired communication protocols. Transmitting information over I2C will improve the performance of the system. As the design becomes complex, verifying the functionality of the design by using traditional test benches will be difficult. Thus the hardware verification languages are used for designing the modules. The verification environment is composed of different verification components which are used for different purpose such as simulating, checking and collecting functional coverage. More time and more resources are required for verification compared to design. The System Verilog is a hardware description language as well as hardware verification language. It is more helpful for the verification process. Object Oriented Programming (OOP) technique is applied in verification environment of System Verilog. A verification environment may be prepared using System Verilog without using any particular methodology but that will be different for every variation of the design. There are various verification methodologies out of which Universal Verification Methodology (UVM) is widely preferred by the verification industry worldwide, as the verification environment created using UVM is reusable, efficient and well structured.

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