Implementation of Canny Edge Detection Algorithm on FPGA and displaying Image through VGA Interface

Electronics and Communication Engineering

NATIONAL CONFERENCE on VLSI, COMMUNICATION AND SIGNAL PROCESSING (NCVCS-2017)

The edge detection is one of the key techniques in most image processing applications. The canny edge detection is proven to be able to significantly outperform existing edge detection techniques due to its superior performance. Unfortunately, the implementation of the systems in real-time is computationally complex, high hardware cost with increased latency. The proposed canny edge detection algorithm uses approximation methods to replace the complex operations; the pipelining is employed to reduce the latency.In this paper we present canny edge detection algorithm implemented on Spartan 3E FPGA and developed VGA interfacing for displaying images on the screen. We have taken 128×128 Image and displayed same on the monitor through FPGA.

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